Revisiting "Partial Power Architectures" from the "Differential Power" Perspective

Abstract

"Partial power processing" refers to some non-isolated architectures that process less power than the nominal power delivered to the load. However, they process the same or higher indirect power than the basic step-down (buck) or step-up (boost) cells. Instead of using the sum of the nominal power (Pout) of each building block to compare different architectures, indirect power (Pind) is a better metric, because there is an amount of direct power (Pdir) transferred to the load that does not add volume nor losses to the components of the circuit. The fundamental minimum possible amount of Pind for a power supply system specification is termed as differential power (Pdiff).In this paper, a high level methodology based on Continuous Power Models (CPMs) and VA interpretation is used to calculate the amount of power processed by the "Partial Power Architectures" (PPAs), and it is found that at architecture level they have the same Pdiff as the basic non-isolated conversion cells, so it is basically a different interpretation of the ports. The basic non-isolated conversion cells, e.g., buck for step-down and boost for step-up, intrinsically have partial power processing. Nevertheless, "partial power architectures" are useful to analyze, compare and synthesize the power converters that process Pdiff by inductive, capacitive, resonant or auto-transformer mechanism.