Edge computing System-on-Chip architecture for a Non-Intrusive Load Monitoring sensor in ambient intelligence applications

dc.contributor.authorNieto, Rubén
dc.contributor.authorDiego-Otón, Laura de
dc.contributor.authorTapiador, Miguel
dc.contributor.authorNavarro, Víctor M.
dc.contributor.authorMurano, Santiago
dc.contributor.authorHernández, Álvaro
dc.contributor.authorUreña, Jesús
dc.date.accessioned2026-02-04T15:55:52Z
dc.date.issued2026-03
dc.description.abstractNon-Intrusive Load Monitoring (NILM) systems allow the disaggregation of the individual consumption of different appliances from aggregate electrical measurements, for applications such as improving energy efficiency at home. In other contexts, NILM techniques are also useful to promote independent living for elderly, as they enable the inference and monitoring of their behavior through the analysis of their energy consumption and the identification of the appliances’ usage patterns. To achieve this, aggregated voltage and current signals are collected at the entrance of the house using a NILM sensor system. This analysis often involves sending the collected data to the cloud for further processing, which can result in significant bandwidth usage, especially when a high sampling rate approach is employed. In this work, a System-on-Chip (SoC) architecture based on a FPGA (Field-Programmable Gate Array) device is proposed for NILM processing, fully performed on edge computing. This architecture is focused on Ambient Intelligence for Independent Living (AIIL) of elderly. Voltage and current data are acquired at 4 kSPS (kilo Samples Per Second), where on/off switchings (events) of appliances are detected, thus delimiting a window of 4096 samples around both signals. These windows are processed by a Convolutional Neural Network (CNN) that implements the load identification. Unlike prior works that primarily focus on algorithmic enhancements, this study introduces a complete hardware/software design of a FPGA-based SoC architecture and its real-time validation. The proposed architecture achieves an inference latency of 56 ms and a classification accuracy of 84.7% for fourteen classes (ON/OFF states of seven appliances), while reducing bandwidth usage by transmitting only the final identification instead of raw signals. These results demonstrate the feasibility of real-time implementations of NILM applications at the edge with competitive performance.
dc.description.sponsorshipThis work has been funded by the Spanish Ministry of Science, Innovation and Universities MCIN/AEI/10.13039/501100011033 (ALONE, ref. TED2021-131773B-I00; INDRI, ref. PID2021-122642OB-C41; AGINPLACE, ref. PID2023-146254OB-C43; NIMBLE, ref. PID2021-123657OB-C32) and by “ERDF A way of making Europe”.
dc.identifier.citationNieto, R., de Diego-Otón, L., Tapiador, M., Navarro, V. M., Murano, S., Hernández, Á., & Ureña, J. (2026). Edge computing System-on-Chip architecture for a Non-Intrusive Load Monitoring sensor in ambient intelligence applications. Microprocessors and Microsystems, 121, Article 105250. https://doi.org/10.1016/j.micpro.2026.105250
dc.identifier.doihttps://doi.org/10.1016/j.micpro.2026.105250
dc.identifier.issn1872-9436
dc.identifier.urihttps://hdl.handle.net/10115/160017
dc.language.isoen
dc.publisherElsevier
dc.rights.accessRightsinfo:eu-repo/semantics/openAccess
dc.titleEdge computing System-on-Chip architecture for a Non-Intrusive Load Monitoring sensor in ambient intelligence applications
dc.typeArticle
dc.type.hasVersionhttp://purl.org/coar/version/c_970fb48d4fbd8a85

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