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Real-Time Hardware in the Loop Simulation Methodology for Power Converters Using LabVIEW FPGA

dc.contributor.authorEstrada, Leonel
dc.contributor.authorVázquez, Nimrod
dc.contributor.authorVaquero López, Joaquín
dc.contributor.authorde Castro, Ángel
dc.contributor.authorArau, Jaime
dc.date.accessioned2023-12-26T15:18:35Z
dc.date.available2023-12-26T15:18:35Z
dc.date.issued2020-01-07
dc.identifier.citationEstrada L, Vázquez N, Vaquero J, de Castro Á, Arau J. Real-Time Hardware in the Loop Simulation Methodology for Power Converters Using LabVIEW FPGA. Energies. 2020; 13(2):373. https://doi.org/10.3390/en13020373es
dc.identifier.issn1996-1073
dc.identifier.urihttps://hdl.handle.net/10115/27830
dc.description.abstractNowadays, the use of the hardware in the loop (HIL) simulation has gained popularity among researchers all over the world. One of its main applications is the simulation of power electronics converters. However, the equipment designed for this purpose is di cult to acquire for some universities or research centers, so ad-hoc solutions for the implementation of HIL simulation in low-cost hardware for power electronics converters is a novel research topic. However, the information regarding implementation is written at a high technical level and in a specific language that is not easy for non-expert users to understand. In this paper, a systematic methodology using LabVIEW software (LabVIEW 2018) for HIL simulation is shown. A fast and easy implementation of power converter topologies is obtained by means of the di erential equations that define each state of the power converter. Five simple steps are considered: designing the converter, modeling the converter, solving the model using a numerical method, programming an o -line simulation of the model using fixed-point representation, and implementing the solution of the model in a Field-Programmable Gate Array (FPGA). This methodology is intended for people with no experience in the use of languages as Very High-Speed Integrated Circuit Hardware Description Language (VHDL) for Real-Time Simulation (RTS) and HIL simulation. In order to prove the methodology’s e ectiveness and easiness, two converters were simulated—a buck converter and a three-phase Voltage Source Inverter (VSI)—and compared with the simulation of commercial software (PSIM® v9.0) and a real power converter.es
dc.language.isoenges
dc.publisherMDPIes
dc.rightsAtribución 4.0 Internacional*
dc.subjectdesign methodologyes
dc.subjectFPGAes
dc.subjecthardware in the loopes
dc.subjectLabVIEWes
dc.subjectreal-time simulationes
dc.subjectpower converterses
dc.titleReal-Time Hardware in the Loop Simulation Methodology for Power Converters Using LabVIEW FPGAes
dc.typeinfo:eu-repo/semantics/articlees
dc.identifier.doi10.3390/en13020373es
dc.rights.accessRightsinfo:eu-repo/semantics/embargoedAccesses


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